A single CMOS switch or a single channel of a CMOS multiplexer essentially consists of an N-channel and a P-channel MOSFET transistor in parallel. The respective drains and sources of the two transistors are tied together to become the switch terminals while the gates of the two transistors are usually driven with the power supply voltages, V.sub.DD and V.sub.SS, to control the on-off action of the switch. Essentially the N-channel is ON for positive gate-to-source voltages and OFF for negative gate-to-source voltages (vice versa for the P-channel).
With a fixed voltage on the gate, the "on" resistance R.sub.ON of the complementary switch varies in proportion to the magnitude of the signal passing through the switch. When R.sub.ON is plotted against applied switch voltage V.sub.S (V.sub.D), the resistance of the N-channel increases with positive voltage and the resistance of the P-channel increases with negative voltage. The resultant parallel combination exhibits the well-known "crown" or twin-peak characteristic. This variation in on-channel resistance with input signal is known as R.sub.ON modulation.
While a varying R.sub.ON or .DELTA.R.sub.ON can be tolerated in some applications, in others it cannot. One attempt to reduce the .DELTA.R.sub.ON employs physically larger transistors. While this approach does work, it has a number of shortcomings. The device is larger and it requires more silicon at greater expense. In addition it introduces greater interelectrode capacitance, which is unacceptable in many applications.